Core Inserter
- In netlist insertion mode, how are nets preserved so they can be probed and not removed during logic optimization?
- Can I use transceivers located in separate quads with the same Exostiv probe?
- Issue when using Vivado 2020.2
- AMD FPGA: which files are produced in RTL flow and how do I use them?
- Intel FPGA: which files are produced in RTL flow and how do I use them?
- Microchip FPGA: which files are produced in RTL flow and how do I use them?
- Which files are produced in RTL flow and how do I use them?
- ‘Failed to assign pinout’ error
- How to use the timing constraints generated by Exostiv Dashboard for Intel?
- My version of Linux does not support libusb. Can I still use the Core Inserter?
- Can I run Vivado and Exostiv Dashboard on separate machines for netlist core insertion?
- What is ‘Number of pipes’ in the Capture Configuration of EXOSTIV IP?
- What is the software build number and how can I check it?
- Can I start Exostiv Dashboard in console mode (TCL)?
- Can I call Exostiv Dashboard from Vivado?
- Exostiv Dashboard Tcl commands list
- What is the ‘event counter’ and how do I use it?
- RTL IP core insertion limitations
- Using ‘Design Checkpoint’ (DCP) flow type
- What are the differences between RTL and netlist flows?
- Which FPGA devices are supported?
- How is EXOSTIV IP set up and generated?
- Which OS is supported?
- How much FPGA resources does Exostiv IP consume?
- How many FPGA nodes can I connect to EXOSTIV IP?
- Can I use Synplify instead of the FPGA vendor synthesis tool?
- Can I probe multiple clock domains?
- Can I use a single EXOSTIV Probe with multiple FPGA devices?
- Does EXOSTIV Dashboard provide design partitioning?
- What is the ‘Vivado link timeout’ setting?
- What is ‘Storage Qualification’?
- I cannot insert EXOSTIV IP because there is an existing instance with the same name in the target design
- Do you provide a scripting interface?
- How can I easily wire my IP throughout hierarchy in RTL flow?
- How do I remove EXOSTIV IP from my netlist to restart insertion?
- Can I share transceiver resources between EXOSTIV IP and the design?
- I need a very specific trigger condition. What can I do?
- Is EXOSTIV Dashboard always backward compatible with an IP generated with an older version?
