Exostiv - Part 2 - Core Inserter Demonstration This is the second part of a series of 3 posts that present our flagship product, Exostiv. This is the material that I use as an introduction to Exostiv; it is composed of 3 parts: - Part 1: Presentation,Read more →
You can capture tons of data. Now what? Offering huge new capabilities is not always seen positively. Sometimes, engineers come to us and ask: 'Now that I am able to collect Gigabytes of trace data from FPGA running at speed... how do I analyze that much data?'.Read more →
Did you know that Exostiv can send triggers across clock domains? 'Visibility into the FPGA' is a multi-dimensional notion. Obviously, it means 'being able to watch' the inner workings of the chip - and hence, acquire the broadest (over)view on the FPGA. Today, we'll cover another aspectRead more →