ASIC & SoC Prototyping

Our solutions enable silicon verification and system software development –
no matter the system complexity, target speed, chosen platform or design flow.

Prototype ASIC or SoC with full visibility at speed.

FPGA prototyping is a key strategic approach to validate IPs and speed up SoC software development when the silicon is not available yet.
Interconnected FPGAs on a board provide the number of gates required to map a complex ASIC and start develop software with some ability to troubleshoot the hardware – most of the time at the expense of the operating frequency, that is reduced to allow partitioning. Validating a prototype at speed of operation in its environment often requires another run of choosing or designing FPGA boards with a reduced number of chips to reach higher or target speed and the adequate interfaces with the environment.

At all stages of this process, deep trace debug captures are necessary to navigate complex silicon and make the most of the ASIC validation time. Unfortunately, generic tools (think JTAG) usually provide poor visibility, whereas prototyping platform vendors’tools only work well with their specific platform and cannot be used at speed with any board.

Exostiv Labs’ solutions provide deep *gigabyte-range* capture capability at speed of operation from any FPGA board, thereby providing extreme visibility into all ASIC and SoC prototyping setups.

Combining large external memories and FPGA high-speed transceivers with a highly configurable IP, our solutions allow streaming massive traces from inside the FPGA prototyping system(s) used throughout the ASIC or SoC validation process.

Capabilities.

  • Watch 32,768 nodes simultaneously per FPGA
  • Sample internal FPGA nodes at 350 MHz and above
  • Capture 8 GB of trace per probe
  • Reach 16x more nodes in a single compilation thanks to data multiplexing
  • Instrument 16 clock domains per FPGA
  • Minimal resources usage in FPGA – (e.g.: < 10% of a XCVU440 for 8K nodes)
  • IP insertion in netlist or VHDL / Verilog

Choose your ASIC prototyping system. Again.

Choosing and setting up an ASIC prototype with FPGAs can be complex – and raise many questions:
– Will you buy it or make it?
– Do you need a single prototyping platform or does it have to evolve during the validation process?
– How will the prototype be interfaced with its target environment?

No matter if you use a commercial system or your own platform designed in-house, our solutions adapt to all of them:

  • Xilinx FPGA support: Series 7, Ultrascale and Ultrascale+.
  • Intel FPGA support: Series 10.
  • Standard connectivity with FPGA boards: FMC, SFP+, QSFP+, SATA – and more.
  • Use any tool for FPGA synthesis

Connectivity.

Exostiv probe connects to FPGA transceivers / SERDES at up to 12.5 Gbps with standard connectors available on most ASIC / SoC prototyping platforms:

  • SFP+ (copper or optical cables);
  • QSFP+ (copper or optical cables);
  • FMC HPC and LPC with a plug-in adapter;
  • SATA with a SFP+ to SATA connectivity kit.

QSFP+ connectivity with add-on board.

Supported commercial ASIC prototyping platforms.

Synopsys

Product nameFPGA VendorFPGA FamilyConnectivity
HAPS-80XilinxVirtex Ultrascale- QSFP+
(using QSFP+ Interface Board QSFPPLUS_MGB)

- SATA (to MGB links)

The Dini Group

Product nameFPGA VendorFPGA FamilyConnectivity
DNVUPF4AXilinxVirtex Ultrascale+QSFP, SFP
DNVUF4AXilinxVirtex UltrascaleQSFP, SFP
DNPCIe_40G_KU_LL_2QSFPXilinxKintex UltrascaleQSFP, SFP
DNV7F4AXilinxVirtex 7QSFP, SFP
DNPCIE_400G_F1SMIntelStratix 10 MXQSFP
DNPCIe_80G_A10_LLIntelArria 10QSFP
Click here for the full list.

PRO Design

Product nameFPGA VendorFPGA FamilyConnectivity
proFPGA unoXilinxVirtex 7, Virtex Ultrascale(+),
Kintex Ultrascale(+),
Zynq Ultrascale+
QSFP+
proFPGA duoXilinxVirtex 7, Virtex Ultrascale(+),
Kintex Ultrascale(+),
Zynq Ultrascale+
QSFP+
proFPGA quadXilinxVirtex 7, Virtex Ultrascale(+),
Kintex Ultrascale(+),
Zynq Ultrascale+
QSFP+
proFPGA unoIntelStratix 10QSFP+
proFPGA duoIntelStratix 10QSFP+
proFPGA quadIntelStratix 10QSFP+