EXOSTIV for Intel (Altera) FPGA – Technical Specifications
Devices & Platforms
| Supported FPGA devices* | Intel Cyclone 10, Arria 10 and Stratix 10 | Quartus prime standard or Quartus prime pro version 17.1 to 19.3 is required. | |
| EXOSTIV™ probe connectivity | HDMI and SFP/SFP+ connector types | With FMC adapter | |
| PC connectivity | USB 2.0 and above | USB 3.0 recommended | |
| PC requirements | min. 1 GB RAM available | ||
| OS Support | Windows, Linux and MacOS | Win32/64*** version 7, 8.x, 10. Linux version: CentOS 6.x**, RHEL 6.x**, CentOS 7.x***, RHEL 7.x***, Ubuntu from 16.04***, Debian 8***, MacOS*** |
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* Other FPGA devices: contact us for roadmap. ** EXOSTIV Dashboard Core Inserter only. *** EXOSTIV Dashboard Core Inserter and Analyzer. |
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Probes – Models & Availability
| EXOSTIV™ Probe | EP6000 6.6 Gbps max./channel |
EP12000 12.5 Gbps max./channel |
|---|---|---|
| 1 channel | NOW | NOW |
| 2 channels | NOW | NOW |
| 4 channels | NOW | NOW |
Features
| Probe memory | 8 GB |
| Connectivity | HDMI and SFP/SFP+ on all probes |
| Number of Gigabit Transceiver channels | 1, 2 or 4 |
| Max. data rate per channel | 6.6 or 12.5 Gbps |
| Max. sampling speed in FPGA | Only limited by target FPGA |
| Max. number of observable FPGA nodes | 32,768 |
| Max. number of capture units | 16 |
| Max. number of FPGA nodes per capture unit | 2,048 |
| Min. FPGA memory per capture unit | 1 block RAM |
| Data groups multiplexing | Up to 16 groups per capture unit |
| Triggering capabilities | Level or transition AND, OR, range conditions Data qualification (data filtering) Sequential triggers in roadmap Concurrent triggering of 1 to 16 capture units Cross-clock domain triggering Transitional storage Trigger positioning |
| Capture modes | Stream or burst to probe |
| Synthesis / Implementation of IP | Requires Quartus software version 17.1 to 19.3 |
| IP insertion level | Manual RTL insertion |
| Data visualization | With MYRIAD™ waveform viewer |
| Data export | vcd, csv and binary formats |
