EXOSTIV for Intel FPGA – Technical Specifications
Devices & Platforms
| Supported FPGA devices* | Intel Cyclone 10, Arria 10 and Stratix 10 SX / GX | Quartus prime standard or Quartus prime pro version 17.1 to 20.2 is required. | |
| EXOSTIV™ probe connectivity | HDMI and SFP/SFP+ connector types | With FMC adapter | |
| PC connectivity | USB 2.0 and above | USB 3.0 recommended | |
| PC requirements | min. 1 GB RAM available | ||
| OS Support | Windows, Linux and MacOS | Win64 version 7, 8.x, 10. Linux version: CentOS 6.x, RHEL 6.x, CentOS 7.x, RHEL 7.x, Ubuntu 16.04, 18.04, Debian 8, 9, MacOS |
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| * Other FPGA devices: contact us for roadmap. | |||
Probes – Models & Availability
| EP6000 Up to 26.4 Gbps (6.6 Gbps x 4) |
EP12000 Up to 50 Gbps (12.5 Gbps x 4) |
|---|---|
| Unavailable | NOW |
Features
| Probe memory | 8 GB |
| Connectivity | HDMI and SFP/SFP+ on all probes |
| Number of Gigabit Transceiver channels | 1, 2 or 4 |
| Max. data rate per channel | 12.5 Gbps |
| Max. sampling speed in FPGA | 390 MHz |
| Max. number of observable FPGA nodes | 32,768 |
| Max. number of capture units | 16 |
| Max. number of FPGA nodes per capture unit | 2,048 |
| Min. FPGA memory per capture unit | 1 block RAM |
| Data groups multiplexing | Up to 16 groups per capture unit |
| Triggering capabilities | Level or transition AND, OR, range conditions Data qualification (data filtering) Concurrent triggering of 1 to 16 capture units Cross-clock domain triggering Transitional storage Trigger positioning |
| Capture modes | Stream or burst to probe |
| Synthesis / Implementation of IP | Requires Quartus software version 17.1 to 20.2 |
| IP insertion level | Manual RTL insertion |
| Data visualization | With MYRIAD™ waveform viewer |
| Data export | vcd, csv and binary formats |
