Visibility into the FPGA.

EXOSTIV Dashboard for Intel – Release Notes

EXOSTIV Dashboard for Intel – Release Notes

Version 1.8.5

  • Build 180910: Improved support for Quartus 18.x
  • Build 180809: Wave export speed up.
  • Added support for Quartus 18.x
  • Added bandwidth calculator / link efficiency check (helper) at core insertion
  • Bug fixes

Limitations and known issues

  • When using Quartus 18.x, engineering sample devices are not supported.
  • On Win 7 machines, connecting to the EXOSTIV Probe in USB 3.0 sometimes fail, depending on the USB 3.0 host. Working around this solution include using USB 2.0 cable to force USB 2.0 usage and/or using Win 10 based machines, where the USB 3.0 support is native.
  • The output clock connector of EXOSTIV Probe does not always match the specified clock. Contact us if you want to use the output clock feature of the probe.

Version 1.8.4

  • Added support for Stratix 10 devices
  • Added support for Quartus Prime PRO software
  • Added TCL scripting interface
  • Fixed issue with using transceivers 5 and 6 in the 6-pack bank
  • Stability enhancements and minor bug fixes

Limitations and known issues

  • On Win 7 machines, connecting to the EXOSTIV Probe in USB 3.0 sometimes fail, depending on the USB 3.0 host. Working around this solution include using USB 2.0 cable to force USB 2.0 usage and/or using Win 10 based machines, where the USB 3.0 support is native.
  • The output clock connector of EXOSTIV Probe does not always match the specified clock. Contact us if you want to use the output clock feature of the probe.

Version 1.8.3

  • Corrected bug affecting runs with multiple capture units simultaneously.
  • Improved the robustness / noise immunity of the link in SFP mode. Requires re-generating the IP.
  • Added support for Debian 9
  • Minor interface bug fixes

Limitations and known issues

  • On Win 7 machines, connecting to the EXOSTIV Probe in USB 3.0 sometimes fail, depending on the USB 3.0 host. Working around this solution include using USB 2.0 cable to force USB 2.0 usage and/or using Win 10 based machines, where the USB 3.0 support is native.
  • Some frequencies that cannot be reached at the back ‘output clock’ connector of the EXOSTIV Probe can be selected in the Dashboard

Version 1.8.2

Limitations and known issues

  • Running multiple capture units at the same time can crash the application. In such a case, power off the probe and restart the application. Try to limit usage at one capture unit at a time.
  • On Win 7 machines, connecting to the EXOSTIV Probe in USB 3.0 sometimes fail, depending on the USB 3.0 host. Working around this solution include using USB 2.0 cable to force USB 2.0 usage and/or using Win 10 based machines, where the USB 3.0 support is native.
  • Some frequencies that cannot be reached at the back ‘output clock’ connector of the EXOSTIV Probe can be selected in the Dashboard

Version 1.7.6

  • License server speed up
  • Fixed I/O voltage selection for I2C downstream channel
  • Minor bugs fixes

Limitations and known issues

  • On Win 7 machines, connecting to the EXOSTIV Probe in USB 3.0 sometimes fail, depending on the USB 3.0 host. Working around this solution include using USB 2.0 cable to force USB 2.0 usage and/or using Win 10 based machines, where the USB 3.0 support is native.
  • A bandwidth problem can appear in some circumstances with small bursts belowe 256 samples. This issue creates an unexpected overflow and sometimes a software crash. Please refer to the following knowledge base article for more information: ‘I received an unexpected overflow error with a burst size smaller than 256 or 512 samples. What happens?’.
    This is due to an issue detected in EXOSTIV Probe.
  • Some frequencies that cannot be reached at the back ‘output clock’ connector of the EXOSTIV Probe can be selected in the Dashboard. Will be filtered in the Dashboard next version.

Version 1.7.5

  • Fixed issue preventing from exporting waves from the waveform viewer.
  • Fixed issue corrupting the first 4 samples of a capture depending on specific capture size conditions.

Version 1.7.4

  • Corrected issue preventing the floating license server from starting up properly in some cases.
  • Provided control for switching between automatic and manual data upload to PC.

    Version 1.7.3

    • Corrected PLL parameter issue preventing from properly generating EXOSTIV IP.

    Version 1.7.2

    • Added support for data rates above 6.6 Gbps (up to 12.5 Gbps)
    • Removed the 325 MHz transceiver clock limitation
    • Added PLL type selection for EXOSTIV IP
    • Updated FPGA database

    Version 1.7.1

    • Corrected offline activation lockup in case of re-activation
    • Added example template for Verilog in RTL flow
    • Fixed IP RAM width issue
    • Fixed possible bug affecting the ‘Samples per captures’ dialog when increasing the number of captures in the GUI
    • Bug fixes and minor corrections
    • Added probe flushing on error

    Version 1.7.0

    *** First release of EXOSTIV for Intel FPGA ***

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