What are the key features of ideal ASIC prototypes? It seems that there has never been a better time to prototype IP, ASIC or SoC with FPGAs. With 35 to 40 billions transistors, the largest FPGA devices on the market can certainly hold quite some share ofRead more →
What can Exostiv Blade do for FPGA prototyping? Classifying FPGA prototyping debug and analysis methodologies. 'FPGA Prototyping' or 'using FPGA boards to prototype an ASIC or a SoC' can be done with a variety of systems. Using such a system requires additional tools to synthesize and partitionRead more →
Delivering High Quality Semiconductor IP with confidence Because they are the essential building blocks of modern ASIC and SoC chips, semiconductor IPs are used in a wide variety of environments, in which they are in service during extended times. Verifying that they run flawlessly in all theseRead more →
Exostiv Blade - Managing multiple sites, targets & users In this video, we demonstrate that Exostiv Blade lets you manage multiple sites, target boards and users to reach your FPGA debug, verification and test goals. In a previous demonstration, we already showed that Exostiv Blade core capabilitiesRead more →
Exostiv Blade is a Game Changer How it started Exostiv Blade all started from client requests in 2018-2019, especially from ASIC & SoC companies. They were seduced by the capture capabilities of Exostiv from FPGA running at speed - in some cases more powerful than the visibilityRead more →
Choosing the ideal FPGA prototype for ASIC and SoC design - White Paper. In the 2020 edition of the Wilson Research Group Verification Survey, Mentor Graphics, a Siemens Business, shows that at least 30% of all respondents designing ASIC or SoC declare using FPGA prototyping, no matterRead more →
The FPGA Prototyping problem we are trying to solve 'A la Carte Menu' or 'Full Course Dinner'? Today, choosing a FPGA-based prototyping platform for ASIC or SoC design reduces to 2 choices: - Either you buy or build a FPGA board and choose EDA tools separately; or:Read more →
On-Demand Webinar: 'How to capture Gigabytes of traces from FPGA. At speed.' In this post, you have the opportunity to catch up with our Webinar that ran live earlier this year. In this -now 'on-demand'- webinar we introduce and demonstrate EXOSTIV and show how it can boostRead more →
Exostiv provides Gigabytes of visibility into the FPGA running at speed of operation from virtually any board. In this webinar, we'll introduce and demonstrate Exostiv and show how it can boost productivity when designing, debugging and verifying FPGA - and this, whether you use FPGA for ASICRead more →
Exostiv provides Gigabytes of visibility into the FPGA running at speed of operation from virtually any board. In this webinar, we'll introduce and demonstrate Exostiv and show how it can boost productivity when designing, debugging and verifying FPGA - and this, whether you use FPGA for ASICRead more →
Exostiv provides Gigabytes of visibility into the FPGA running at speed of operation from virtually any board. In this webinar, we'll introduce and demonstrate Exostiv and show how it can boost productivity when designing, debugging and verifying FPGA - and this, whether you use FPGA for ASICRead more →
Announcing… EXOSTIV for Intel FPGA Using Intel FPGA? We have exciting news for you: EXOSTIV will soon support Intel FPGA! Please check the pictures above and below – this is EXOSTIV working with the ‘Attila’ dev kit of our partner, Reflex-CES, equipped with one Arria 10 GX
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