10 things you should know before SoC Validation 1. Validation and verification are different things 2. Emulators do not replace prototypes (and the other way round) 3. There are silicon bugs left to be found during validation 4. Design size matters 5. Each FPGA size matters 6.Read more →
The future of FPGA Quite unusually, I'd like to share some random thoughts about the evolution of our industry. It has escaped to no one, these are exciting times, with tech giants scrambling to build the most successful company in computing. As you see with the pictureRead more →
Why we should scale FPGA tools - White Paper. In the 2020 edition of the Wilson Research Group Verification Survey [1], Siemens EDA, shows that a staggering 83% share of FPGA designs went to production with bugs in 2020. The results show that this share has remainedRead more →
10 cool things about us... #1 Our waveform viewer commonly processes Gigabytes of waves without lagging That's because we have to display data recorded from #FPGA in operation during seconds, minutes or even hours, not just a window of waves from a simulation. So we needed toRead more →
Exostiv supports Intel Stratix 10 FPGA As Intel Stratix 10 FPGA gets deployed for real applications, we are ready too at Exostiv Labs! Stratix 10 devices are supported from Exostiv Dashboard for Intel v. 1.8.4 (and stay tuned, because Cyclone 10 FPGA are around the corner...). WeRead more →
Announcing… EXOSTIV for Intel FPGA Using Intel FPGA? We have exciting news for you: EXOSTIV will soon support Intel FPGA! Please check the pictures above and below – this is EXOSTIV working with the ‘Attila’ dev kit of our partner, Reflex-CES, equipped with one Arria 10 GX
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