Visibility into the FPGA.

‘Failed to assign pinout’ error

‘Failed to assign pinout’ error

Applies to Exostiv for Xilinx.
When running core insertion in netlist flow mode and Vivado, Exostiv Dashboard can return the following error:

Error : Failed to assign pinout.
Error : Message id : 0x80030506
Error :
Error : Vivado returned error:
Error : ERROR: [Common 17-55] ‘set_property’ expects at least one object.Resolution: If [get_] was used to populate the object, check to make sure this command returns at least one valid object.
Error :
Error : EXOSTIV IP insertion failed.

When such an issue occurs, check the Vivado log and search for the following warning right after the ‘Connecting probes…’.


Connecting probes…
WARNING: [Vivado 12-1609] Net (net name) is marked DONT_TOUCH by the tool (not by the user), and it cannot be unset.
Resolution: If the net is set as MARK_DEBUG, then MARK_DEBUG must be unset to remove the DONT_TOUCH
WARNING: [Vivado 12-1609] Net ‘u_demo/sdi_R[1]’ is marked DONT_TOUCH by the tool (not by the user), and it cannot be unset.
Resolution: If the net is set as MARK_DEBUG, then MARK_DEBUG must be unset to remove the DONT_TOUCH

The issue originates from Vivado setting some nets as ‘don’t touch’ and not allowing for subsequent changes.

Re-synthesizing the projet and re-starting the process of inserting the debug core usually solves the problem.

STAY IN TOUCH

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