Why Observability matters. At Exostiv Labs, we think that 'Observability' - or 'Visibility' - that is 'the ability to observe (and understand) a system from its I/Os' - is relevant - and even key to FPGA debug. I'd like to show it with a real example takenRead more →
Massive Real-time FPGA Data Capture A game-changer to prevent bug escapes to production. Welcome to this recorded session - thank you for your interest. If you are using AMD Ultrascale™(+) devices then you will be fully aware of the complexity of the designs these FPGAs can holdRead more →
Did you know that Exostiv can send triggers across clock domains? 'Visibility into the FPGA' is a multi-dimensional notion. Obviously, it means 'being able to watch' the inner workings of the chip - and hence, acquire the broadest (over)view on the FPGA. Today, we'll cover another aspectRead more →
Deep Trace & Bandwidth Exostiv provides the following maximum capabilities for capturing data from inside FPGA running at speed: Capabilities. 50 Gigabit per second bandwidth for collecting FPGA traces. 8 Gigabyte of memory for trace storage. 32,768 nodes probing simultaneously. 524,288 nodes reach. Actually, we have builtRead more →