Why we should scale FPGA tools – White Paper.

In the 2020 edition of the Wilson Research Group Verification Survey [1], Siemens EDA, shows that a staggering 83% share of FPGA designs went to production with bugs in 2020. The results show that this share has remained relatively stable over the past decade.
The stability is remarkable. It means that the tools and methodologies have evolved sufficiently to keep pace with the evolution of the FPGA complexity (typically, this complexity doubles every two years for FPGA chips – see for instance Wikipedia – List of Xilinx FPGAs). However, it also means that no matter the adoption of more advanced design and verification techniques, we have been unable so far to significantly improve the success rate of FPGA design.

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As always, thank you for reading.
– Frederic