What do you use FPGA prototyping for? Typical usages of FPGA prototyping FPGA Prototyping is used for various purposes. Here are 2 of its main usages: FPGA Debug: at some point of the FPGA design cycle, tests have to be run with a 'real' FPGA board toRead more →
Why Observability matters. At Exostiv Labs, we think that 'Observability' - or 'Visibility' - that is 'the ability to observe (and understand) a system from its I/Os' - is relevant - and even key to FPGA debug. I'd like to show it with a real example takenRead more →
Massive Real-time FPGA Data Capture A game-changer to prevent bug escapes to production. Welcome to this recorded session - thank you for your interest. If you are using AMD Ultrascale™(+) devices then you will be fully aware of the complexity of the designs these FPGAs can holdRead more →
You can capture tons of data. Now what? Offering huge new capabilities is not always seen positively. Sometimes, engineers come to us and ask: 'Now that I am able to collect Gigabytes of trace data from FPGA running at speed... how do I analyze that much data?'.Read more →
EXOSTIV lets you peer deeper into FPGA Watch now... EXOSTIV Introduction EXOSTIV's structure (see below) allows deeper data capture from inside FPGA: unlike JTAG instrumentation, EXOSTIV provides an external storage that extends beyond the memory available in the FPGA. Coupled with the usage of transceivers, it createsRead more →
Deep Trace & Bandwidth Exostiv provides the following maximum capabilities for capturing data from inside FPGA running at speed: Capabilities. 50 Gigabit per second bandwidth for collecting FPGA traces. 8 Gigabyte of memory for trace storage. 32,768 nodes probing simultaneously. 524,288 nodes reach. Actually, we have builtRead more →
‘My FPGA debug and verification flow should be improved…’ In my last post, I revealed some of the results of our recent survey on FPGA. These results depicted a ‘flow-conscious’ FPGA engineer, using a reduced mix of methodologies in the flow and very prone to going to
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